1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and an electronic device. More specifically, the present invention relates to a semiconductor device where a multi-layer wiring structure body and electronic components are electrically connected, a method of manufacturing the same, and an electronic device.
2. Description of the Related Art
FIG. 1 is a sectional view of a related-art electronic device.
Referring to FIG. 1, a related-art electronic device has semiconductor devices 201, 202, and an inside connection terminal 203. The semiconductor device 201 includes a wiring board 211, an electronic component 212, an under-fill resin 213, and an outside connection terminal 214.
The wiring board 211 is a plate-shaped multi-layer wiring structure body. The wiring board 211 includes laminated insulating layers 216, 217, wiring patterns 219, 228, 229, a pad 221, solder resist layers 222,226, and outside connection pads 223, 224. The insulating layer 216 is provided on an upper surface 217A of the insulating layer 217.
The wiring pattern 219 and the pad 221 are provided on an upper surface 216A of the insulating layer 216. The wiring pattern 219 has pad portions 232, 233 exposed from the solder resist layer 222. The pad 221 is exposed from the solder resist layer 222.
The solder resist layer 222 is provided on the upper surface of the insulating layer 216A. The outside connection pads 223, 224 are provided on a lower surface of the insulating layer 217. Lower surfaces of the outside connection pads 223, 224 are exposed from the solder resist 226.
The solder resist layer 226 is provided on a lower surface 217B of the insulating layer 217. The wiring patterns 228, 229 are provided in the insulating layers 216, 217 laminated on each other. The wiring pattern 228 connects the pad portion 233 and the outside connection pad 223. The wiring pattern 229 connects the pad 221 and the outside connection pad 224.
The electronic component 212 is arranged between the semiconductor devices 201 and 202. The electronic component 212 has an electrode pad 236. The electrode pad 236 is electrically connected to the pad portion 232 via a bump 237 (for example, a solder bump).
The under-fill resin 213 is provided to fill a gap between the electronic component 212 and the wiring board 211. The outside connection terminal 214 is provided on lower surfaces of the outside connection pads 223, 224.
The semiconductor device 202 is arranged on an upper side of the semiconductor device 201. The semiconductor device 202 includes the wiring board 241, the electronic component 243, and a molding resin 246. The wiring board 241 is plate-shaped, and includes pads 251, 252, 254. The pad 251 faces the pad portion 233, and is electrically connected to the pad portion 233 via the inside connection terminal 203. The pad 252 faces the pad 221, and is electrically connected to the pad 221 via the inside connection terminal 203. The pad 254 is electrically connected to the pad 251 or 252.
The electronic component 243 is adhered on the wiring board 241, and is electrically connected to the pad 254 via a metal wire 244. The molding resin 246 is provided on the wiring board 241. The molding resin is provided to seal the metal wire 244 and the electronic component 243.
The inside connection terminal 203 has such a size (height) that the electronic component 212 and the semiconductor device 202 do not contact each other. The inside connection terminal 203 may have a height of 200 μm (see Japanese Laid-Open Patent Application Publication No. H6-13541, for example)
However, since the related-art semiconductor device 201 is such that the electronic component 212 arranged on the wiring board 211 and the wiring board 211 (multi-layer wiring structure body) are electrically connected, the related-art semiconductor device 201 has a problem that a size in a direction of height of the semiconductor device 201 is increased.
Furthermore, when the electronic component 212 and the wiring board 211 are electrically connected via the bump 237, it is necessary to arrange the bump 237 in order not to contact an adjacent bump 237. Therefore, there is a problem that it is difficult to reduce an arrangement pitch of the bumps 237, and that it is impossible to finely and densely arrange the wiring pattern 219 connected the bump 237.
Also, in the related-art electronic device 200, it is required that a height of the inside connection terminal 203 be greater than a sum of heights of the electronic component 212 and the bump 237. Accordingly, there is a problem that a size in a width of the electronic device 200 is increased.
Incidentally, when the electronic component 212 and the wiring board 211 are connected by wire-bonding, there is also a problem that widths of the electronic device 200 and the semiconductor device 201 are increased.
In view of such problems, an objective of the present invention is to provide a semiconductor device wherein a wiring pattern connected to an electrode pad of an electronic component is finely and densely arranged, and a size in a direction of a thickness is reduced, to provide a method of manufacturing the same, and to provide an electronic device.